TDSEL=0, WSEL=0, LADSEL=0, LACC=0, LGO=0, LCMD=00
Cache line control register
| LGO | Initiate Cache Line Command 0 (0): Write: no effect. Read: no line command active. 1 (1): Write: initiate line command indicated by bits 27-24. Read: line command active. |
| RESERVED | no description available |
| CACHEADDR | Cache address |
| RESERVED | no description available |
| WSEL | Way select 0 (0): Way 0 1 (1): Way 1 |
| RESERVED | no description available |
| TDSEL | Tag/Data Select 0 (0): Data 1 (1): Tag |
| RESERVED | no description available |
| LCIVB | Line Command Initial Valid Bit |
| LCIMB | Line Command Initial Modified Bit |
| LCWAY | Line Command Way |
| RESERVED | no description available |
| LCMD | Line Command 0 (00): Search and read or write 1 (01): Invalidate 2 (10): Push 3 (11): Clear |
| LADSEL | Line Address Select 0 (0): Cache address 1 (1): Physical address |
| LACC | Line access type 0 (0): Read 1 (1): Write |
| RESERVED | no description available |